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OVP Peripheral Model: RiscvSmartLoaderRV64Linux

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Model Specific Information

This page provides introductory usage information for an Imperas OVP peripheral behavioral model. The page is split into sections providing specific information for this peripheral, including any ports for connecting into a platform, registers, other component parts, and configuration options and general information for peripheral modeling with Imperas OVP.

Licensing

Open Source Apache 2.0

Description

Psuedo-peripheral to insert boot code for a Riscv 64-bit Linux kernel boot. Loads simulated memory with a device tree blob file and boot code to set regs and jump to a Risc-v Linux Kernel.

Limitations

Only supports little endian

Reference

RISC-V Linux Kernel development

Location

The SmartLoaderRV64Linux peripheral model is located in an Imperas/OVP installation at the VLNV: riscv.ovpworld.org / peripheral / SmartLoaderRV64Linux / 1.0.

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Peripheral Instance Parameters

This model accepts the following parameters:

Table : Peripheral Parameters

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Bus Master Ports

This model has the following bus master ports:

Bus Master Port: mport

Table 1: mport

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Platforms that use this peripheral component

Peripheral components can be used in many different platforms, including those developed by Imperas or by other users of OVP. You can use this peripheral in your own platforms.

Table 2: Publicly available platforms using peripheral 'SmartLoaderRV64Linux'